A microprocessor device is a central processing unit or CPU for a digital processor which is usually contained in a single semiconductor integrated circuit or "chip" fabricated by MOS/LSI technology, as shown in U.S. Pat. No. 3,757,306 issued to Gary W. Boone and assigned to Texas Instruments. The Boone patent shows a single-chip 8-bit CPU including a parallel ALU, registers for data and addresses, an instruction register and a control decoder, all interconnected using the von Neumann architecture and employing a bidirectional parallel bus for data, address and instructions. U.S. Pat. No. 4,074,351, issued to Gary W. Boone, and Micheal J. Cochran, assigned to Texas Instruments, shows a single-chip "microcomputer" type device which contains a 4-bit parallel ALU and its control circuitry, with on-chip ROM for program storage and on-chip RAM for data storage, constructed in the Harvard architecture. The term microprocessor usually refers to a device employing external memory for program and data storage, while the term microcomputer refers to a device with on-chip ROM and RAM for program and data storage. In describing the instant invention, the term "microcomputer" will be used to include both types of devices, and the term "microprocessor" will be primarily used to refer to microcomputers without on-chip ROM; since the terms are often used interchangeably in the art, however, it should be understood that the use of one or the other of these terms in this description should not be considered as restrictive as to the features of this invention.
Modern microcomputers can be grouped into two general classes, namely general-purpose microprocessors and special-purpose microcomputers/microprocessors. General purpose microprocessors, such as the M68020 manufactured by Motorola, Inc., are designed to be programmable by the user to perform any of a wide range of tasks, and are therefore often used as the central processing unit in equipment such as personal computers. Such general-purpose microprocessors, while having good performance for a wide range of arithmetic and logical functions, are of course not specifically designed for or adapted to any particular one of such functions. In contrast, special-purpose microcomputers are designed to provide performance improvement for specific predetermined arithmetic and logical functions for which the user intends to use the microcomputer. By knowing the primary function of the microcomputer, the designer can structure the microcomputer in such a manner that the performance of the specific function by the special-purpose microcomputer greatly exceeds the performance of the same function by the general-purpose microprocessor regardless of the program created by the user.
One such function which can be performed by a special-purpose microcomputer at a greatly improved rate is digital signal processing, specifically the computations required for the implementation of digital filters and for performing Fast Fourier Transforms. Because such computations consist to a large degree of repetitive operations such as integer multiply, multiple-bit shift, and multiply-and-add, a special-purpose microcomputer can be constructed specifically adapted to these repetitive functions. Such a special-purpose microcomputer is described in U.S. Pat. No. 4,577,282, assigned to Texas Instruments Inc. The specific design of a microcomputer for these computations has resulted in sufficient performance improvement over general purpose microprocessors to allow the use of such special-purpose microcomputers in real-time applications, such as speech and image processing.
Digital signal processing applications, because of their computation intensive nature, also are rather intensive in memory access operations. Accordingly, the overall performance of the microcomputer in performing a digital signal processing function is not only determined by the number of specific computations performed per unit time, but also by the speed at which the microcomputer can retreive data from, and store data to, system memory. Prior special-purpose microcomputers, such as the one described in said U.S. Pat. No. 4,577,282, have utilized modified versions of a Harvard architecture, so that the access to data memory may be made independent from, and simultaneous with, the access of program memory. Such architecture has, of course, provided for additional performance improvement.
Direct memory access (DMA) is another useful function for special purpose microcomputers, especially those directed to digital signal processing. An on-chip DMA controller is often used in microcomputers having DMA capability, so that the DMA operation can occur independently from the central processing unit. However, regardless of the choice of Harvard or von Neumann architecture, the use of either program or data buses for the DMA operation may require that the DMA must wait for program or data access before continuing. In the case of a digital signal processor, the program and data buses are both heavily used. If DMA is given the lowest priority to the program and data buses, the DMA performance of the microcomputer can be quite slow.
However, in many applications, the computer program which the microcomputer wishes to execute is stored in memory which is external to the microcomputer. This especially impacts the performance of DMA operations, since DMA is primarily used for data communications between on-chip and external memory. Even if multiple buses are used internal to the microcomputer, the communication with external memory is still done with a single bus due to the need to minimize device terminals. Accordingly, the fetching of instruction codes from external memory can severely impact the performance of the DMA operation.
It is therefore an object of this invention to provide a microcomputer which has an instruction cache for storage of program memory, so that DMA operations to external memory may take place without being interrupted by instruction fetch operations from external memory.
It is a further object of this invention to provide such a microcomputer which has a DMA bus separate from the program bus which serves the instruction cache, to further minimize the interference between the instruction fetch and DMA operations.
It is a further object of this invention to provide such a microcomputer which has a single memory address space which can be flexibly partitioned by the user into data and program storage, so as to maximize the ability of the DMA operation to proceed without conflict with data and program access.
Further objects and advantages of the instant invention will become apparent to those of ordinary skill in the art having reference to the following specification, together with its drawings.